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    4,794 verilog vhdl งานที่พบ, การเสนอราคา USD
    Verilog/Modelsim Simple Pipeline หมดเขตแล้ว left

    This project is in Verilog and is 80% complete for a simple pipelined cpu. The are steps to be followed in the zip file to get the final correct wave form. ## Deliverables 1) All deliverables will be considered "work made for hire" under U.S. Copyright law. Employer will receive exclusive and complete copyrights to all work purchased. (No 3rd party components unless all copyright ramifications are explained AND AGREED TO by the employer on the site per the worker's Worker Legal Agreement). ## Platform Windows XP, ModelSim, Verilog

    $30 - $5000
    $30 - $5000
    0 คำเสนอราคา
    ModelSim/Verilog Project for a simple pipelined CPU หมดเขตแล้ว left

    This project is in Verilog and is 80% complete for a simple multi cycle cpu. The code in comments needs to be uncommented and correct signals coded to complete the design. Further details are in the zip file.

    $30 - $5000
    $30 - $5000
    0 คำเสนอราคา
    $1191 การประมูลเฉลี่ย
    15 คำเสนอราคา
    vhdl project หมดเขตแล้ว left

    hi .i hav to convert a 4bit audio signal and convert it to A-to-D by spartern 3e, after that the digital signal has to be converter to D-to-A , I want to know is it possible to do by spartern 3e?? if yes then how...plz help me its my m-tech project....plz send the sollution by .

    $50 (Avg Bid)
    $50 การประมูลเฉลี่ย
    1 คำเสนอราคา
    FPGA Temperature monitoring system using VHDL หมดเขตแล้ว left

    Need to design a FPGA Temperature monitoring system using VHDL. The target board used is a Spartan 3A starters development kit. Temperature sensor is a K-type thermocouple connected via the RS232 port. Refer Sensor circuit attached. Readings should be displayed in the onboard LCD of the target board.

    $170 (Avg Bid)
    $170 การประมูลเฉลี่ย
    13 คำเสนอราคา
    Verilog: show me how to code this better หมดเขตแล้ว left

    ...I'm not very familiar with Verilog, so the implemention is messy. I want someone to look at my Verilog code and show me how it should have been written, making the I2C decoder it's own module, being able to write data to several registers. The code should compile on the free Altera Quartus II programming environment, but doesn't need to be tested on an actual CPLD. ## Deliverables 1) All deliverables will be considered "work made for hire" under U.S. Copyright law. Employer will receive exclusive and complete copyrights to all work purchased. (No 3rd party components unless all copyright ramifications are explained AND AGREED TO by the employer on the site per the worker's Worker Legal Agreement). ## Platform Using the free Quartus II...

    $85 (Avg Bid)
    $85 การประมูลเฉลี่ย
    1 คำเสนอราคา
    Processor design using VHDL หมดเขตแล้ว left

    Hi Sir, My project is to design a Barrel processor (architecture design and coding in VHDL). I have no prior experience in this field. Can you help me out. I have given a short note on my project below. I have to design a barrel processor that has to execute only one instruction from each thread at a time for all threads upto N threads. I need to design the architecture for the Barrel processor and has to implement the processor on a FPGA by using VHDL. So, I have to take a basic architecture of any of the processor and have to modify it such that the processor has N - number of PC,SP,SR,Thread IDs,etc. for each thread. I have to cycle all these registers of each thread at their turn executing only one instruction at a time...

    $271 (Avg Bid)
    $271 การประมูลเฉลี่ย
    7 คำเสนอราคา

    I need simple solution for analog-to-digital conversion using the Xilinx Spartan 3E FPGA and the onboard A/D converter on Xilinx Spartan 3E Starter Kit development board. I need to sample signals on 2 channels of the A/D converter with the sampling frequency of about 1.5 MHz. The solution should be developed as an vhdl-module.

    $147 (Avg Bid)
    $147 การประมูลเฉลี่ย
    7 คำเสนอราคา
    FPGA programming in VHDL หมดเขตแล้ว left

    I need an Electronics Engineer with good experience in VHDL programming, PCI board design, DMA. The deliverables are schematics, gerbers, and BOM.

    $1995 (Avg Bid)
    แนะนำ
    $1995 การประมูลเฉลี่ย
    20 คำเสนอราคา
    Translation of a simple SystemC code into VHDL หมดเขตแล้ว left

    A rather simple SystemC project (cosisting of 14 cpp files of the size similar to the one accessible at ) is to be converted into synthesizable VHDL (ISE 10.1 project). The conversion can be done manually or automatically (using an adequate EDA tool), the only requirement is that the code has to comile and synthesize on the ISE. I can pay for the task up to 125 USD.

    $112 (Avg Bid)
    $112 การประมูลเฉลี่ย
    12 คำเสนอราคา
    VHDL/C++ FIR Filter หมดเขตแล้ว left

    Filter FIR in VHDL for cut low , med and high frequencies of audio.

    $1250 (Avg Bid)
    $1250 การประมูลเฉลี่ย
    6 คำเสนอราคา
    designing using XILINX หมดเขตแล้ว left

    Assignement is due on thursday afternoon 5.00 pm australian time and its long and has to be done using XILINX and verilog

    $217 (Avg Bid)
    $217 การประมูลเฉลี่ย
    4 คำเสนอราคา
    415280 basic vhdl หมดเขตแล้ว left

    Ok, I'm in need of someone who can make a well documented (comment in code) VHDL file. I'm trying to make a buzzer circut in VHDL. (The image of the circut is attached). Basically the buzzer would go off if someone turned on the ignition and either the car door was opened and/or the seatbelt wasn't on. It would be good if I can have this done by tomorrow night at the latest.

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    VHDL Project หมดเขตแล้ว left

    VHDL project Includes coding, initial report and final report. The board being used is: Altera® DE1 Development and Education board

    $119 (Avg Bid)
    $119 การประมูลเฉลี่ย
    8 คำเสนอราคา
    ALU - VHDL หมดเขตแล้ว left

    See attachment. Would need completed by 5/3/10. Thank you. ## Deliverables 1) Complete and fully-functional working program(s) in executable form as well as complete source code of all work done. 2) Deliverables must be in ready-to-run condition, as follows (depending on the nature of the deliverables): a) For web sites or other server-side deliverables intended to only ever exist in one place in the Buyer's environment--Deliverables must be installed by the Worker in ready-to-run condition in the Buyer's environment. b) For all others including desktop software or software the buyer intends to distribute: A software installation package that will install the software in ready-to-run condition on the platform(s) specified in this bid request. 3) All deliverables will...

    $280 (Avg Bid)
    $280 การประมูลเฉลี่ย
    1 คำเสนอราคา
    simulator หมดเขตแล้ว left

    design a simulator for a dynamically scheduled CPU using scoreboard algorithm and the tomasulo's algorithm for the scoreboard assuming a MIPS like basic arithmetic instructions (+, -, *, /). add and subtract have latencies of 2 cycles, multiply has a latency of 10 and divide has a latency of 40 be done using any high level language or HDL's like C, C++, verilog etc ## Deliverables 1) Complete and fully-functional working program(s) in executable form as well as complete source code of all work done. 2) Deliverables must be in ready-to-run condition, as follows (depending on the nature of the deliverables): a) For web sites or other server-side deliverables intended to only ever exist in one place in the Buyer's environment--Deliverables must be installed

    $56 (Avg Bid)
    $56 การประมูลเฉลี่ย
    3 คำเสนอราคา
    405500 VHDL.Program หมดเขตแล้ว left

    Very simple VHDL program, It involves creating a design that can be tested and bench. The requirements are in the file.

    $55 (Avg Bid)
    $55 การประมูลเฉลี่ย
    1 คำเสนอราคา
    403702 VHDL Program 2 หมดเขตแล้ว left

    The particular problem allocated to you is selected by taking modulus(school ID, 2) + 1; for example modulus(0572796, 2)+1=0+1=problem 1. For each problem, use Sonata VHDL software to design the system and the corresponding test bench in accord with the stated functionalities.

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    403532 VHDL Project หมดเขตแล้ว left

    This is a small project. Please read attached documenation

    $45 (Avg Bid)
    $45 การประมูลเฉลี่ย
    1 คำเสนอราคา
    401961 VHDL Program หมดเขตแล้ว left

    This is a small project. Please read attached documenation

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    0 คำเสนอราคา
    400918 VHDL Project หมดเขตแล้ว left

    I have a small program which needs to be done in VHDL language.

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    0 คำเสนอราคา
    400648 VHDL Program หมดเขตแล้ว left

    The particular problem allocated to you is selected by taking modulus(school ID, 2) + 1; for example modulus(0572796, 2)+1=0+1=problem 1. For each problem, use Sonata VHDL software to design the system and the corresponding test bench in accord with the stated functionalities.

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    0 คำเสนอราคา
    Simple VHDL code for controlling RC servo หมดเขตแล้ว left

    This is a little project in microcontroller subject at university. We are going to design a simple servo (two dimensional movement) using VHDL, and by using ALTERA DE2 kit. We need a fully functionable VHDL which utilize pulse width modulation to control the movements of the servo. Input must be keyboard or mouse. All code must be commented in great detail and the coder must also write an explainatory document on how the different modules has been implemented. Besides the conditions mentioned above, the coder is free to choose rest of the design phase.

    $42 (Avg Bid)
    $42 การประมูลเฉลี่ย
    3 คำเสนอราคา
    Altera SOPC (vhdl)Micron PSram Burst R/W controller หมดเขตแล้ว left

    ...company requires an experience VHDL and Altera SOPC engineer to ? design and develop a? high-speed burst mode? Micron PSRAM controller for the MT45w8mw16bgx Psram. The details of the controllers specs can be found on the chips datasheet shown below:- <> Further more this controller should meet ? the following specs:- -Burst Read and write mode -Async read and write mode -avalon MM slave interface -SOPC Component -Multiple clock rates supported -Low LE count -synchronous? design ## Deliverables -All modules should be designed in VHDL. -All code should be commented. -All modules will be tested using Modelsim simulation. -Modules should have vhdl Test benches included. -All modules

    $892 (Avg Bid)
    $892 การประมูลเฉลี่ย
    2 คำเสนอราคา
    Internal Camera GUI หมดเขตแล้ว left

    Hello Everyone, I am looking for an experienced VHDL Coder to design and develop an internal Overlay system. This will be a simple controller which will on push of long press button will enter a menu, and on a short press will scroll through the menu. Similarly this overlay system will have to create overlay screens for every frame. This overlay will be constantly being updated depending on the status of the device. We need this to be completely designed in VHDL and Commented, and most importantly designed for the Altera Cyclone 3 devices, and must be SOPC compatible. Hope to here from some one asap, regards nadeem

    $217 (Avg Bid)
    $217 การประมูลเฉลี่ย
    7 คำเสนอราคา
    Need Verilog Testbench หมดเขตแล้ว left

    I am looking for someone to write verilog test benches for a project. All details are in the attached file ## Deliverables 1) Complete and fully-functional working program(s) in executable form as well as complete source code of all work done. 2) Deliverables must be in ready-to-run condition, as follows? (depending on the nature? of the deliverables): a)? For web sites or? other server-side deliverables intended to only ever exist in one place in the Buyer's environment--Deliverables must be installed by the Seller in ready-to-run condition in the Buyer's environment. b) For all others including desktop software or software the buyer intends to distribute: A software? installation package that will install the software in ready-to-run condition on the platform(...

    $30 - $50
    $30 - $50
    0 คำเสนอราคา
    41339 PILNE!! VHDL mały projekcik szkolny หมดเขตแล้ว left

    szczegóły na mail.

    min $2
    min $2
    0 คำเสนอราคา
    40708 układ w VHDL หมดเขตแล้ว left

    witam, potrzebuje napisać układ mnożący mod 2n-1 w systemie RNS w jezyku VHDL.

    min $2
    min $2
    0 คำเสนอราคา
    Low cost FPGA SDRAM Controller หมดเขตแล้ว left

    Design a circuit and program VHDL for low cost SDRAM controller using FPGA: Requirements: 1) Can use single slot standard PC133 SODIMMs 2GB notebook memory with standard SODIMM slot 2) Operates as? SPI SDRAM (same design as? Microchip 32kbyte SPI SRAM? <>? except 32bits to support 2GB of memory) 3) Has SPI interface (CS, CLK, DI, DOUT) with following commands: OP CODE + Address + DATA OP Codes: 00 -read register 01 -write register Address: 32bits DATA: 32bits 32 bit Registers: Address: 0x00 Status 4) 6 pin interface with 2x3 .1" headers pin 1: +3.3V pin 2: GND pin 3: DI pin 4: DOUT pin 5: CLK You should? can use free open IP FPGA Core for SDRAM and IP core? interface

    $568 (Avg Bid)
    $568 การประมูลเฉลี่ย
    6 คำเสนอราคา
    Brach history table &amp; branch target buffer หมดเขตแล้ว left

    this assignment is to develop a branch target buffer and a branch history table using VHDL and the code should be compiled in Altera. (it is available for free). go to the following link and look in the end which explains the project deliverables. thanks

    $30 - $5000
    $30 - $5000
    0 คำเสนอราคา
    Working with FPGA memory หมดเขตแล้ว left

    Objectives: * Display more complex graphics onto the screen using stored bitmaps * Combining BRAMS and VGA components to make more substantial designs ++++++++++++++++++++++++++++++++++++++++++++++++++++ your name on the screen: 2. Displaying a flag on the screen. We are using VHDL here. Xilinx ISE version 10.1 ## Deliverables Rent A Coder requirements notice: As originally posted, this bid request does not have complete details. Should a dispute arise and this project go into arbitration "as is", the contract's vagueness might cause it to be interpreted against you, even though you were acting in good-faith. So for your protection, if you are interested in this project, please work-out and document the requirements onsite. 1) Complete and fully-functional ...

    $42 (Avg Bid)
    $42 การประมูลเฉลี่ย
    1 คำเสนอราคา
    VHDL-AMS simple switch capacitor DAC หมดเขตแล้ว left

    Use VHDL-AMS or Verilog AMS to create a 4-bit DAC (switched capacitor). Should be able to take a 4-bit value from a .dat or .txt file (preferably, though can compromise and just have it as a variable in the code). The basic structure is 4 switches, 2 capacitors, and the switches are switched depending on the input so that the charge of Capacitor 1 (VC1) and Capacitor 2 (VC2) are distributed back and forth. Basically the objective is to take a 4-bit input and output the corresponding Vreference level for that 4 bit input, e.g. 1/16th Vref, 1/2 Vref, etc. I can provide the details of how the system works and a basic timing diagram of what it should do. I would like the code for this (preferably that works on the HAMSTER AMS software (free) or Smash (free Student Trial). ...

    $30 - $5000
    $30 - $5000
    0 คำเสนอราคา
    2 port switch in verilog หมดเขตแล้ว left

    This project is to create a 2 port working switch in verilog which can be implemented on a fpga board like NetFPGA.

    $255 (Avg Bid)
    $255 การประมูลเฉลี่ย
    1 คำเสนอราคา
    VHDL programming หมดเขตแล้ว left

    Hi, this is the part of the project. You have to design a cache system using altera quartus. Follow the link? <>? and just read the details for project 2. Description, requirements and test programs for the project are all given in the link. It is basically extending the design of a project which is already completed. if you want the original project email me asap i will send you all the .VHD files of the original project. You will probably need the files of the original project? in order? to match the signal names and to connect the new part. I want it in 2 days.? Thanks

    $340 (Avg Bid)
    $340 การประมูลเฉลี่ย
    2 คำเสนอราคา
    Drafting,Mechatronics,Quantum,Verilog,Chemical หมดเขตแล้ว left

    I have a website that needs to be tweaked constantly. The job is pretty much easy, but I plan on establishing a long term relationship with someone who has the skills I am looking for. It doesn't matter your experience level, just prove you can get the job done. For more details on the project, please goto the following website and watch a short video for precise instrustions.

    $3000 (Avg Bid)
    $3000 การประมูลเฉลี่ย
    1 คำเสนอราคา
    ElectronicsEng Italian 100 related links หมดเขตแล้ว left

    We want to promote the Italian section of our blog. A blog on electronics engineering, schematics, microcontrollers, embedded linux, gps, circuits, pcb, mems, fpga, vhdl, zigbee, optoelectronics, c programming, firmware, robotics, audio projects, rf circuits, industrial and automotive electronics and general technology hi-tech sci-tech. - YOU MUST HAVE A BASIC TECHNICAL SKILL - YOU MUST HAVE ITALIAN NATIVE WRITING links requirements: - Blog,forum,newsgroup must be in italian language and the links must be in to the conversation/comments. Insert the link only at the end of the related post-comments-thread - absolutely no only the link (spam)! - do-follow links - links should be from pages related to the categories of our blog - Most of donor pages should be easily indexe...

    $30 - $250
    $30 - $250
    0 คำเสนอราคา
    QPSK Error correction and implementation in VHDL หมดเขตแล้ว left

    You are requested to suggest and develop a hardware solution to correcting the IQ phase error in QPSK transmission and demonstrate your solution in VHDL. In particular, present an analysis of the precision requirements for the data used in within the VHDL code and an analysis for clock speed requirements assuming typical data sampling frequencies. might provide some overview information in QPSK system. Do not hesitate to ask me if you have anything unclear. Many thanks Martin ## Deliverables Most importantly description of error correction algorithm, Then, in case there is time left, VHDL code, some screen shots of simulation, implementation details/description. ## Platform Any Windows server, XP or Vista

    $148 (Avg Bid)
    $148 การประมูลเฉลี่ย
    1 คำเสนอราคา

    We are asked to do the following: 1. Develop a VHDL model of a complete QPSK system, as specified in Section 4.1 in , and implement it on a suitable Xilinx or Altera FPGA. 2. Develop and implement a VHDL module and a suitable PC application to send the IQ phase errors to a PC over a USB link and display the errors on the PC screen. 3. Suggest and develop a hardware solution to correcting the IQ phase error and demonstrate your solution in VHDL. In particular, present an analysis of the precision requirements for the data used in within the VHDL code and an analysis for clock speed requirements assuming typical data sampling frequencies. 4. In addition to the technical work specified above, write a chapter in your report on methods, ethics and responsibilitie...

    $300 (Avg Bid)
    $300 การประมูลเฉลี่ย
    1 คำเสนอราคา
    353120 Programming Project 1253721820 หมดเขตแล้ว left

    Hi, I need to develop HDL editor with a) Verilog(HDL) syntax correction, b) with dynamic hints for good coding guidelines (as and when designer writes code, gets hints by editor for good coding rules). c) along with above functionality I need to have basic editor functionality like marking, copying, pasting, folding of code, etc. Also editor should be MDI application and should be platform independent (Mostly editor will be run on linux system and X windows). (I shall provide detailed RS (Requirement Specification) once developer is decided) For above editor I need developer who can develop it using wxWidgets (scintilla lib ). wxWidgets has already developed libraries for editor functionality. Hence one only has to use them and just add wrapper of rules

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    353112 Verilog HDL Editor หมดเขตแล้ว left

    Hi, I need to develop HDL editor with a) Verilog(HDL) syntax correction, b) with dynamic hints for good coding guidelines (as and when designer writes code, gets hints by editor for good coding rules). c) along with above functionality I need to have basic editor functionality like marking, copying, pasting, folding of code, etc. Also editor should be MDI application and should be platform independent (Mostly editor will be run on linux system and X windows). (I shall provide detailed RS (Requirement Specification) once developer is decided) For above editor I need developer who can develop it using wxWidgets (scintilla lib ). wxWidgets has already developed libraries for editor functionality. Hence one only has to use them and just add wrapper of rules

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    0 คำเสนอราคา
    Verilog Project - E123 Mux/E1 Framer หมดเขตแล้ว left

    ...the E12MUX architecture and model the E12MUX in Verilog. The FPGA being targeted should be considered and synthesizable code should be written targeting the efficient usage of chosen FPGA resources. The model should be simulated in any industry standard simulator Perform the following and report the same in your assignment: 1. Identify the sub blocks for the selected architecture of E12MUX 2. Model the design using verilog HDL, carry out the functional simulation and verify the results with appropriate input test cases. 3. Simulation and analysis of results obtained using multiple test cases to prove E12MUX Problem Statement: Part B 1.) For the E12MUX designed in part A above write an efficient test bench in Verilog 2.) The test b...

    $256 (Avg Bid)
    $256 การประมูลเฉลี่ย
    9 คำเสนอราคา
    cryptographic coprocessor for smart card หมดเขตแล้ว left

    I want to write a code in verilog to make a cryptographic coprocessor for smartcards. I dont have the architecture of it. If anyone have the architecture that will be a great help. If anyone can give code along with the architecture and the details of it that will be superb. The coprocessor use RSA algorithm for security.

    $30 - $50
    $30 - $50
    0 คำเสนอราคา
    virtual 32 bit CPU development หมดเขตแล้ว left

    Implement a virtual CPU in C and write a backend for the latest stable version of the Portable C Compiler ( ) for it. ## Deliverables I want to develop a novell CPU core for a FPGA in VHDL. For this CPU I need a C compiler. Your task is the following: - get the latest stable version of the Portable C Compiler (PCC) from - analyze, how the backend code generation works - propose a simple instruction set for a CPU, which can map the intermediate representation of PCC very direct to the instruction set and document in detail how this mapping can be done. Floating point support is not required, only a very basic register machine, which can be used for implementing the compiler backend, for compiling simple C programs for embedded systems

    $191 (Avg Bid)
    $191 การประมูลเฉลี่ย
    2 คำเสนอราคา
    FPGA-Xilinx-VHDL Angle detect หมดเขตแล้ว left

    **Add to an existing FPGA project two new functionality.** Programming environment: Xilinx ISE 11.2 Xilinx device: XC3S700AN Simulator is required to check design Phase angle: Calculate the angle between three analogue signals of a three phase power system namely phase 1, 2 and 3. The code for sampling the signals are already implemented. The signal need to be filtered...is available and a 10Mhz clock is available at two I/O pin of the FPGA. A 24 bit counter (GPS counter) will be incorporated into the FPGA, clocked by the 10 MHz clock and reset by the PPS. When the phase voltages crosses zero, the content of the GPS counter is transfer into a corresponding register to be transfer to a microcontroler. ## Deliverables The programming language must be ...

    $202 (Avg Bid)
    $202 การประมูลเฉลี่ย
    9 คำเสนอราคา