I need to implement the data path for a single cycle processor supporting both load word (lw) and store word (sw) instructions. The instructions need to be typed out in assembly and machine code, inputted into a text file then initialized into the ISE design. The design must be done on ISE design suite, with the PC, Register File, ALU, Instruction Memory, Data Memory, Sign extender from my knowledge.
Hi,
I have done many MIPS projects before using Verilog/VHDL. You can see my profile.
Relevant Skills and Experience
Verilog/VHDL, Assembly
Proposed Milestones
$10 USD - i
$10 USD ใน 1 วัน
0.0 (0 รีวิว)
0.0
0.0
3 freelancers are bidding on average $23 USD for this job