MIPS32 Instruction Set Simulator

I need an incredible software developer to develop me a MIPS32 Instruction Set Simulator, and I need it by around 12pm noon 10th April. The skeleton code is done, I just need someone to implement the instructions highlighted in the specification, and a brief article (1 page-ish) on a high-level overview of how you did it. Attached are some test files for testing the code. All of the specification is found in the PDF file attached ********************************************************************** NOTES BELOW As I mentioned in the specification document, I have provided skeleton files in the [login to view URL] and [login to view URL] archives in the Assignments folder. You should download one of these, unpack it, and use the files as the initial versions in your SVN repository for the assignment. I'd suggest that you start with the memory class, since much of the simulator relies on it. You can then get the m and l commands working. Next you could implement the processor registers, allowing you to get the $ and pc commands working. After that, you'll be ready to dive into execution of instructions. That will involve fetching instructions from memory, decoding them, and performing the required operations for each type of instruction. To help you check your work as you incrementally develop your simulator, I have provided a suite of tests. They're uploaded to the Assignments folder in a subfolder called Stage-1-tests. You can start with the test cases in the command_tests tgz/zip archives. Each test case exercises one of the commands. You can run each test case by invoking your simulator with the .cmd file as redirected standard input on the command line, for example: ./mipsim < [login to view URL] I've provided log files containing output from my simulator for each test case. You can use them as a guide for the expected results from your simulator. If you want to compare your output with the expected output, you can pipe you simulator output to diff, for example: ./mipsim < [login to view URL] | diff - [login to view URL] The next group of test cases is in the harness_tests tgz/zip archives. These are basic tests for execution of five instructions: nop, lui, addi, bne and jal. (The nop instruction is actually sll, $0, $0, 0.) If you look at the .cmd files, you'll see that they work by setting a memory location to contain the binary-coded word for an instruction, then executing the instruction and displaying the resulting register and/or pc value. Again, I've provided log files from my simulator, including from runs with the -v option. In my simulator, I use the -v option to enable trace writes to help me debug the program. I'd strongly recommend you do something similar. (You don't have to produce exactly the same debug output as my simulator; you can output more or less information, depending on what you need to debug.) The reason for choosing these five instructions for basic tests is that I use them for a more comprehensive test harness for a complete test suite for all instructions. That test suite is in the instruction_tests tgz/zip archive. As you will see, the test cases are in assembly language, translated to hex files for loading into the simulator. I'll describe that test suite and how to use it in more detail in a later posting.